[quote:ef57053e25="MHz"]It took me a long time to figure out ...[/quote:ef57053e25]
It may also be, that you expect a functionality, which the µC doesn't provide and your result is because of this undefined state.
This would explain, why a simulator does it right, while the µC has a different opinion about it.
Quote from the data sheet:
[quote:ef57053e25]The ICR1 Register can only be written when using a Waveform Generation mode that utilizes the ICR1 Register for defining the counters TOP value. In these cases the Waveform Generation mode (WGM13:0) bits must be set before the TOP value can be written to the ICR1 Register. When writing the ICR1 Register the high byte must be written to the ICR1H I/O location[/quote:ef57053e25]
Could you explain, beside the inconsistency of the output, where this gives an actual problem?
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