Thanks to all for their input on this. From the code examples here I was able to use the DFLL successfully, verify adjusted oscillators and verify external 32.768KHZ clock source.
Here is a picture of the Counter standard in the lab. 1mS desired pulse.
Yep, I can live with that!!!!
Now to add the Xmega AVR-DOS and update the benchmark program. I'll be updating a previous thread on that when that benchmark program is completed.
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