Hi,
This is a nasty bit blockage that I have struggled with a couple of days.
Running an XMEGA128D3 on external 16MHz crystal is enabled by XOSCEN in the OSC_CTRL register.
XOSCCTRL need also be set up for correct drive level and freq range for proper oscillation of a HF-xtal
However there are some dependencies between registers, so to change the latter register we must first turn off XOSCEN.
So...
The CPU is currently running from the internal 32MHZ ring oscillator.
The LOCK reg is zero (unlocked)
The XOSCEN bit is for some reason turned ON just after reset. Now I want to turn it off for the reasons above.
I am allowed to reset all clock sources in OSC_CTRL but of course not R32MEN (The active source)
The strange thing is however that neither can I set XOSCEN bit low. **** WHY IS THAT ***
There seem to be a logic blockage like for the active source???
Any ideas are most welcome?
/Per
Register dump:
64: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 0A 02 00 00 35 01 02 00 00 00 00 00 00 00 00 00
96: 01 00 40 06 3D 12 7A 00 00 00 40 0A 3D A1 07 00
[b][color=red](BASCOM-AVR version : 2.0.7.6 )[/b][/color]
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